用VHDL设计一个倒计时计数器，lcd实时显示秒表计时值，时钟信号50mHz，同步电路模式

Question

如题所述

Answer 1

初始计时25s 通过ta tb可以对倒计时进行设置0~99s qa qb输出到显示
后面接个译码器就可以显示 ldn是调节有效位 en为开始倒计时按键
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY JSQ IS
PORT(CLR,LDN,EN,CLK: IN STD_LOGIC;
TA,TB,KK: IN BIT;
QA: OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
QB: OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END ENTITY JSQ;
ARCHITECTURE ART OF JSQ IS
SIGNAL DA: STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL DB: STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
PROCESS(TA,CLR) IS
BEGIN
IF CLR='1' THEN
DA<="0000";
ELSE
IF TA'EVENT AND TA='1' THEN
DA<=DA+'1';
IF DA>="1001" THEN DA<="0000";
END IF;
END IF;
END IF;
END PROCESS;
PROCESS(TB,CLR)
BEGIN
IF CLR='1' THEN
DB<="0000";
ELSE
IF TB'EVENT AND TB='1' THEN
DB<=DB+'1';
IF DB>="1001" THEN DB<="0000";
END IF;
END IF;
END IF;
END PROCESS;
PROCESS(CLK) IS
VARIABLE TMPA: STD_LOGIC_VECTOR(3 DOWNTO 0);
VARIABLE TMPB: STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
IF CLR='1' THEN TMPA:="0101"; TMPB:="0010";
ELSIF CLK'EVENT AND CLK='1' THEN
IF LDN='1' THEN TMPA:=DA; TMPB:=DB;
ELSIF (EN='1' AND KK='0') THEN
IF TMPA="0000" THEN
TMPA:="1001";
IF TMPB="0000" THEN TMPB:="0010";
ELSE TMPB:=TMPB-1;
END IF;
ELSE TMPA:=TMPA-1;
END IF;
END IF;
END IF;
QA<=TMPA; QB<=TMPB;
END PROCESS;
END ARCHITECTURE ART;

Answer 2

...高于81MHz高频信号发生器（或无线电综合测试仪）；1.18Hz—81MHz函数信号发生器；低频毫伏表；高频毫伏表；普通频率计；通用计数器；电位差计；变频电源；8位半数字万用表；秒表；米尺;失真度测试仪；室温表8.1级；...